The semiconductor industry is increasing its use of silicon integrated circuits. In particular, there is a demand for silicon-on-insulator structures comprising a "mushroom" shape, i.e. a relatively narrow "stem" of silicon grown through an oxide layer and a silicon "head," of larger lateral dimension than the "stem," grown on top of the stem in such a manner that a portion of its lateral extent is positioned on top of the oxide layer. The concurrently filed U.S. patent application Ser. No. 940,436, entitled "Semiconductor Mushroom Structure Fabrication," by Peter J. Schubert and John C. Christenson, commonly assigned with this application and incorporated by reference herein (referred to hereinafter as Schubert et al), discloses a method for fabricating a "mushroom" shape structure where one embodiment comprises fabricating monocrystalline (single crystal) silicon in a hole-within-a-hole structure like that shown in FIG. 1 herein. In FIG. 1, silicon dioxide layer 10 is formed on silicon substrate 1 and the hole-within-a-hole structure comprises a first, larger hole 120 and a second, smaller hole 130. In one embodiment of the disclosed method, as shown in FIG. 2 herein, photoresist mask 100 is formed on silicon dioxide layer 10. FIG. 3 herein shows the structure formed from the structure shown in FIG. 2 after layer 10 has been partially etched and photoresist mask 100 has been removed to form a first, larger hole 120. FIG. 4 herein shows the structure formed from the structure shown in FIG. 3 after photoresist mask 110 has been formed to allow etching of second, smaller hole 130 shown in FIG. 1. Such a method encounters difficulties in resolving second, smaller hole 130 as its dimensions shrink. Although standard photolithography can resolve small dimensions on a planar surface, the patterning of a small hole in a non-planar topography as shown in FIGS. 2-4 is more difficult.
The difficulties with the conventional, photolithographic method for creating the hole-within-a-hole structure in non-planar topologies arises from two fundamental limitations. A first limitation is that, after a larger, "outside" hole 120 has been created, the resultant topology makes it difficult to reliably pattern smaller, "inside" hole 130. Poor repeatability and reduced reliability in the devices fabricated using this structure occur as a result of reflected light from corners and varying thicknesses of photoresist. A second limitation is that, a slight misalignment is always present when two distinct photolithography steps are used in the same area. Further, the method of creating the hole-within-a-hole shown in FIGS. 2-4 often requires that silicon dioxide layer 10 shown in FIG. 1 be etched back to achieve a desired thickness. This etch-back step is subject to the nonuniformities of the etching system. These nonuniformities are typically plus or minus 5 per cent. As a result, devices such as a Silicon-On-Insulator-Like (SOIL) insulated gate field effect transistor (IGFET) fabricated in this manner may have degraded performance.
Thus, it is desirable to have a method for growing a hole-within-a-hole structure which resolves the smaller hole at small dimensions.